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We are very active in SBIR
programs, which provide seed funding for new technology
development. We are continually seeking system integrator
partnership and product development/sales channels for these programs.
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Ultra-Small Solderable Transceiver |
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The CORE
is a sealed component and is compatible with
solder reflow PCB assembly. The CORE can
be handled and packaged in a standard ASIC
package, such as a QNF. This elminates the
costs and reliablity issues associated with
electrical connectors and minimizes the PCB
footprint. A 12.5 Gbps quad transciever is in
development in three configurations for
customers.
NASA - Space: The CORE can be
outfitted with non-volatile memory for space
applications, and mounted with TEC devices to
reach the extreme temperature ranges needed in
space exploration.
NAVAIR
- OTDR in Test Equipment: The
CORE with the integrated OTDR ASIC creates an
OTDR component that can be inserted within
portable OTDR test equipment to provide
high-resolution (1 cm) measurements on multiple
fiber channels simulataneously.
AFRL -
Stand-alone Transceiver:
The CORE with an integrated micro-controller
creates a stand-alone, fully functional
transceiver in a package less that 5 mm in
height and operating at 12.5 Gbps per channel. |
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Top Down Connector |
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We have developed a
ribbon fiber connector interface for harsh
environment applications. The fixed
pigtail adds costs throughout the transceiver
lifespan, from manufacturing to final use in the
field. A broken pigtail fiber at best is
fixed with fusion splicing, at worst takes out
the entire transceiver. Because fiber cables are
not compatible with solder reflow, a removabe
pigtail enables the fielding of solder
reflowable transceiver components that can be
pick-and-place assembled. Our
approach utilizes expanded beam optical
interface to give alignment tolerance at the
connector interface.
(Phase II SBIR - TPOC Brian McDermott,
NAVAIR) |
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Built In Test in a Ruggedized Transceiver |
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During
the development and deployment of fiber optic
systems, the fiber cable plant is susceptible to
damage (especially at connectors). We are
addressing this problem with Built-in-Test
features:
Today: We have incorporated a
method of optically measuring end-to-end link
loss within the Phantom X20. The average
optical power transmitted and received is
available for digital read-out.
In Development: We are
developing optical time domain reflectrometry
(OTDR) capability within the transceiver.
This isolates the location of a fiber faults
throughout the cable plant to less than 1 cm
resolution. This program also increases
the data rate to 12.5 Gbps per channel (50 Gbps
aggregate). (Navy Phase III — TPOC Mark
Beranek, NAVAIR) |
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Space Based Fiber Optic Components / Photonics
Manufacturing |
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The Photonics
Manufacturing program creates a fabrication
platform for technologies developed under
UltraComm SBIR programs: built-in-test,
radiation tolerant circuitry, hermitically
sealed removable pigtail interface, and single
channel board-to-board components. The
lead vehicle for this platform is a
JSF-footprint compatible quad transceiver with a
removable pigtail.
(Air Force Phase II SBIR - TPOC Keith Avery,
AFRL) |
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Board to Board Optical Interconnects |
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Single
Channel Tx w/ Integrated Memory |
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As high performance,
stacked PCB systems adopt higher-data rate bus
standards, such as PCI-Express, the stacked
electrical connectors pose density, signal
integrity and EMI issues. We are developing
novel optical board-to-board and thru-board
optical interconnects to solve these issues.
This program developed single channel 10 Gbps
components with integrated memory to store
calibration data.
(Army Phase IIE SBIR— TPOC Michael Gerhold, ARL) |
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Multi-Channel DWDM Tunable Transmitter |
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We are teamed with West
Virginia High Technology Consortium to develop a
multi-channel DWDM transmitter (MCTX) with eight
individual data channels, each of which can be
assigned a wavelength from the nine available
defined by the 1550 nm C-Band ITU Grid (32-40).
Each channel of the transmitter operates at a
data rate between 2.5 Gbps. The goal is a
robust package suitable for military aerospace
applications.
(Navy Phase II SBIR— TPOC Brian McDermott,
NAVAIR) |
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Wafer Bonding Technology for BiCMOS on Sapphire |
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We
identified a process for producing very high
performance RF silicon circuitry in a manner
that enables unprecedented levels of RF
integration. This program began with an
investigation into a general wafer substrate
substitution process for optimizing the
substrate in silicon fabrication processes,
called silicon-on-X (SOX), where X is a
substrate material that optimizes the silicon
circuitry for a target applications (high-power,
thermal expansion coefficients, isolation,
optical, etc.). The near-term benefit of this
technology is its application to BiCMOS RF
circuitry.
(DARPA Phase I SBIR— TPOC Michael Fritze, DARPA) |
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RF Photonics with Multi-Mode Devices |
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We examined the use of
commercial 850 nm Vertical Cavity Surface
Emitting Lasers (VCSEL) and multimode optical
fiber for analog RF communication applications.
We found phase noise performance better than
-120 dBc/Hz in the frequency range from 100 MHz
to 5 GHz (10 kHz offset). This performance
meets the needs of a wide range of RF photonic
applications, offering extreme isolation,
compact size, low power consumption, and
flexible cabling. See
white paper or contact us for more
information.
(Air Force Phase I SBIR— TPOC Lt. Matthew White,
WPAFRL) |
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Embedded Active Components within PCB Structures |
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We
developed a technology to cost-effectively
extend the rate/reach/density performance of
FR-4 PWB technology far beyond the current state
of the art. The maxim achievable lengths of a
board interconnect is inversely proportional to
the data rate. Current industry efforts to
integrate equalizers at the IC level will not
overcome this trend. Next-generation systems
will require 10’s of ICs having 1000’s of
high-speed (>10 Gbps) I/O. Under these
conditions, high frequency attenuation will
limit the maximum length of a trace to just a
few inches, even with the use of equalization.
Our solution is to embed passive equalization
and active repeater functionality within the PWB
core.
This program developed general technology for
embedding active components within the printed
circuit board structure in a manner compatible
with standard PCB manufacturing.
(DARPA Phase II SBIR— TPOC Michael Fritze,
DARPA) |
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